90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique.
Masanao YamaokaNoriaki MaedaYoshihiro ShinozakiYasuhisa ShimazakiKoji NiiShigeru ShimadaKazumasa YanagisawaTakayuki KawaharaPublished in: IEEE J. Solid State Circuits (2006)