Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications.
Marco LanuzzaMartin MargalaPasquale CorsonelloPublished in: ISLPED (2005)
Keyphrases
- cost effective
- low power
- low cost
- single chip
- gate array
- high speed
- power reduction
- hardware and software
- multimedia
- real time
- cost effectiveness
- low power consumption
- high power
- wireless transmission
- quality of service
- logic circuits
- vlsi architecture
- digital signal processing
- signal processor
- vlsi circuits
- systolic array
- rfid tags
- general purpose
- data center
- digital signal
- parallel processing
- cmos technology
- digital camera
- delay insensitive