Modeling of DG-Tunnel FET for low power VLSI circuit design.
Sunil KumarBalwinder RajPublished in: IC3 (2015)
Keyphrases
- low power
- high speed
- circuit design
- single chip
- vlsi circuits
- power consumption
- vlsi architecture
- gate array
- low cost
- power dissipation
- high power
- logic circuits
- low power consumption
- mixed signal
- wireless transmission
- delay insensitive
- digital signal processing
- digital circuits
- design automation
- digital government
- cmos technology