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A design for testability of non-volatile memory reliability test for automotive embedded processor.
Chung Chuang
Chun-Yen Wu
Chi-Chun Hsu
Li-Ren Huang
Wei-Min Cheng
Wen-Dar Hsieh
Published in:
APCCAS (2012)
Keyphrases
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main memory
single chip
case study
functional verification
design process
memory hierarchy
dynamic random access memory
database
memory subsystem
design methodology
high speed
data structure
computer architecture
embedded systems
test cases
hw sw
low cost