Login / Signup

Design of FPGA-Implemented Reed-Solomon Erasure Code (RS-EC) Decoders With Fault Detection and Location on User Memory.

Zhen GaoLingling ZhangYinghao ChengKangkang GuoAnees UllahPedro Reviriego
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2021)
Keyphrases
  • reed solomon
  • fault detection
  • error correction
  • fault diagnosis
  • user experience
  • error control
  • unequal error protection
  • real time
  • image transmission
  • turbo codes