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Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits.

Abdessatar AbderrahmanEduard CernyBozena Kaminska
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1999)
Keyphrases
  • test generation
  • analog circuits
  • worst case
  • static analysis
  • neural network
  • case study
  • feature space
  • lower bound
  • high speed
  • test set
  • test sequences