A Memory-Efficient Hardware Architecture for Connected Component Labeling in Embedded System.
Chen ZhaoWu GaoFeiping NiePublished in: IEEE Trans. Circuits Syst. Video Technol. (2020)
Keyphrases
- memory efficient
- hardware architecture
- connected component labeling
- binary images
- connected components
- hardware implementation
- quadtree
- hardware architectures
- morphological operations
- associative memory
- raster scan
- gray scale
- mathematical morphology
- field programmable gate array
- external memory
- computer vision
- machine learning
- x ray
- feature selection
- block matching motion estimation