A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS.
Hisakatsu YamaguchiHirotaka TamuraYoshiyasu DoiYasumoto TomitaTakayuki HamadaMasaya KibuneShuhei OhmotoKeita TateishiOleksiy TyshchenkoAli SheikholeslamiTomokazu HiguchiJunji OgawaTamio SaitoHideki IshidaKohtaroh GotohPublished in: ISSCC (2010)
Keyphrases
- feed forward
- high speed
- adaptive neural
- back propagation
- neural nets
- artificial neural networks
- neural network
- hidden layer
- neural architecture
- recurrent neural networks
- biologically plausible
- low cost
- visual cortex
- artificial neural
- analog to digital converter
- power consumption
- adaptive control
- computer simulation
- power supply
- single chip
- multipath
- recurrent networks
- primate visual cortex
- nonlinear systems
- step size
- low power
- artificial intelligence
- learning algorithm