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Exploiting built-in delay lines for applying launch-on-capture at-speed testing on self-timed circuits.
Omar Al-Terkawi Hasib
Daniel Crepeau
Thomas Awad
Andrei Dulipovici
Yvon Savaria
Claude Thibeault
Published in:
VTS (2018)
Keyphrases
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power dissipation
low power
high speed
power consumption
vlsi circuits
database
low cost
test cases
straight line
digital signal processing
cmos technology
power reduction
real time
hough transform
steady state
d objects
wireless sensor networks
circuit design
genetic algorithm
critical path
logic circuits