Formal sizing rules of CMOS circuits.
Daniel AuvergneNadine AzémardV. BonzomDenis DeschachtMichel RobertPublished in: EURO-DAC (1991)
Keyphrases
- delay insensitive
- high speed
- analog vlsi
- circuit design
- vlsi circuits
- cmos technology
- formal specification
- focal plane
- low voltage
- low cost
- formal model
- low power
- production rules
- rule based systems
- power consumption
- asynchronous circuits
- random access memory
- real time
- rule sets
- infrared
- logic circuits
- association rules
- data mining