Benchmarking and optimization of trench-based multi-gate transistors in a 40 nm non-volatile memory technology.
Romeric GayVincenzo Della MarcaHassen AzizaArnaud RégnierStephan NielAbderrezak MarzakiPublished in: DTIS (2021)
Keyphrases
- cmos technology
- metal oxide semiconductor
- low power
- power consumption
- power dissipation
- nm technology
- low voltage
- low cost
- embedded dram
- main memory
- integrated circuit
- optimization problems
- parallel processing
- optimization algorithm
- silicon on insulator
- optimization process
- memory usage
- flash memory
- high speed
- rapid development
- data processing
- constrained optimization
- memory space
- data storage
- optimization method
- computer systems
- genetic algorithm