A 580 fs-Resolution Time-to-Digital Converter Utilizing Differential Pulse-Shrinking Buffer Ring in 0.18 µm CMOS Technology.
Tetsuya IizukaSatoshi MiuraRyota YamamotoYutaka ChibaShunichi KuboKunihiro AsadaPublished in: IEICE Trans. Electron. (2012)
Keyphrases
- low voltage
- cmos technology
- mixed signal
- low power
- flip flops
- data conversion
- spl times
- power consumption
- design considerations
- analog to digital converter
- parallel processing
- random access memory
- cmos image sensor
- high resolution
- high speed
- digital circuits
- multi channel
- power dissipation
- power management
- video data
- low cost