Embracing Systolic: Super Systolization of Large-Scale Circulant Matrix-vector Multiplication on FPGA with Subquadratic Space Complexity.
Jiafeng XieChiou-Yng LeePublished in: FPGA (2019)
Keyphrases
- space complexity
- condition number
- sparse matrix
- systolic array
- arc consistency
- worst case
- real time
- matrix multiplication
- real world
- matrix representation
- field programmable gate array
- eigenvalues and eigenvectors
- least squares
- linear algebra
- rows and columns
- high speed
- signal processing
- linearly independent
- feature vectors
- real time image processing
- small scale
- transformation matrix
- floating point
- frequency domain
- message passing
- low rank
- image processing
- symmetric matrices
- hardware implementation