Login / Signup
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip.
Igor Loi
Federico Angiolini
Shinobu Fujita
Subhasish Mitra
Luca Benini
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2011)
Keyphrases
</>
fault tolerant
fault tolerance
distributed systems
load balancing
evolvable hardware
interconnection networks
circuit design
high availability
low cost
state machine
vlsi implementation
high speed
social networks
high density
safety critical
data replication
complex systems