Where is the Achilles Heel under Circuit Aging.

Ketul Sutaria Athul Ramkumar Rongjun Zhu Yu Cao

Published in: ISVLSI (2014)

Keyphrases

high speed
circuit design
electronic circuits
age estimation
analog circuits
age related
analog vlsi
digital circuits
neural network
delay insensitive
tunnel diode
real time
software aging
logic synthesis
evolvable hardware
cmos technology
control method
low power
image processing