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A Hardware-Efficient Approximate Multiplier Combining Inexact Same-weight N:2 Compressors and Remapping Logic with Error Recovery.

Renrui DuanMingtao ZhangYi GuoShinichi NishizawaShinji Kimura
Published in: SOCC (2023)
Keyphrases
  • error recovery
  • error detection
  • hardware implementation
  • text understanding
  • error correction
  • video transmission
  • plan generation
  • embedded systems
  • network coding