A survey of memory architecture for 3D chip multi-processors.
Yuang ZhangLi LiZhonghai LuAxel JantschMinglun GaoHongbing PanFeng HanPublished in: Microprocess. Microsystems (2014)
Keyphrases
- multithreading
- memory subsystem
- memory access
- level parallelism
- memory hierarchy
- processing elements
- instruction set
- parallel computing
- computational power
- ibm zenterprise
- memory bandwidth
- main memory
- digital signal processors
- parallel algorithm
- data access
- parallel architecture
- signal processor
- memory management
- processing units
- real time
- high speed
- shared memory
- random access
- analog vlsi
- external memory
- processor core
- associative memory
- vlsi implementation
- low cost
- single instruction multiple data
- management system
- video decoder
- processor array
- distributed memory
- parallel processing
- reconfigurable hardware
- design considerations
- computer architecture
- high performance computing
- image processing algorithms
- high density
- cmos image sensor
- low power
- memory requirements
- nm technology
- signal processing
- embedded dram