A 40nm RRAM Compute-in-Memory Macro Featuring On-Chip Write-Verify and Offset-Cancelling ADC References.
Wantong LiXiaoyu SunHongwu JiangShanshi HuangShimeng YuPublished in: ESSCIRC (2021)
Keyphrases
- analog to digital converter
- chip design
- nm technology
- single chip
- random access memory
- cmos technology
- high speed
- high density
- power dissipation
- dynamic random access memory
- low cost
- read write
- low power
- memory subsystem
- memory requirements
- multithreading
- sigma delta
- analog vlsi
- memory usage
- level parallelism
- ibm zenterprise
- vlsi implementation
- computational power
- main memory
- embedded dram
- memory access
- neural network