A Multi-Gbps Unrolled Hardware List Decoder for a Systematic Polar Code.
Pascal GiardAlexios Balatsoukas-StimmingThomas Christoph MüllerAndreas Peter BurgClaude ThibeaultWarren J. GrossPublished in: CoRR (2017)
Keyphrases
- error detection
- low cost
- real time
- reed solomon
- hardware implementation
- error control
- ldpc codes
- hardware and software
- motion estimation
- hardware architecture
- turbo codes
- distributed video coding
- image processing
- fourier analysis
- industry standard
- java virtual machine
- hardware description language
- computing systems
- hardware design
- video codec
- massively parallel
- fpga implementation
- rotation invariant
- fourier transform
- frequency domain
- computer systems
- source code
- open source