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Circuit Topology-Based Test Pattern Generation for Small-Delay Defects.

Sandeep Kumar GoelKrishnendu ChakrabartyMahmut YilmazKe PengMohammad Tehranipoor
Published in: Asian Test Symposium (2010)
Keyphrases
  • small number
  • power dissipation
  • machine learning
  • response time
  • information systems
  • knowledge base
  • high speed
  • binary images
  • machine vision
  • circuit design