A Modular All-Digital PLL Architecture Enabling Both 1-to-2GHz and 24-to-32GHz Operation in 65nm CMOS.
Alexander V. RylyakovJosé A. TiernoDidem Zeliha TurkerJean-Olivier PlouchartHerschel A. AinspanDaniel J. FriedmanPublished in: ISSCC (2008)
Keyphrases
- power consumption
- high speed
- clock gating
- cmos technology
- nm technology
- low power
- metal oxide semiconductor
- analog vlsi
- cmos image sensor
- power management
- real time
- frequency band
- circuit design
- dual band
- software architecture
- management system
- mixed signal
- neural network
- analog to digital converter
- modular architecture
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- highly flexible
- hardware and software
- digital libraries
- intel xeon