A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCO.
Koichiro MinamiMuneo FukaishiMasayuki MizunoHideaki OnishiKenji NodaKiyotaka ImaiTadahiko HoriuchiHiroshi YamaguchiTakanori SatoKazuyuki NakamuraMasakazu YaniashinaPublished in: CICC (2001)