SAT-based Formal Fault-Resistance Verification of Cryptographic Circuits.
Huiyu TanPengfei GaoTaolue ChenFu SongZhilin WuPublished in: CoRR (2023)
Keyphrases
- search space
- bounded model checking
- sat solvers
- formal methods
- model checking
- asynchronous circuits
- fault diagnosis
- formal verification
- fault detection
- cryptographic protocols
- answer set programming
- formal specification
- fault models
- smart card
- formal analysis
- analog circuits
- state space
- temporal logic
- high assurance
- analog vlsi
- delay insensitive
- quantum computing
- verification method
- neural network
- formal model
- logic synthesis
- high speed