Login / Signup

No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips.

Shu-Hsuan ChouChien-Chih ChenChi-Neng WenYi-Chao ChanTien-Fu ChenChao-Ching WangJinn-Shyan Wang
Published in: DAC (2009)
Keyphrases
  • high density
  • information sharing
  • integrated circuit
  • neural network
  • data structure
  • search algorithm
  • input output
  • knowledge sharing
  • data sharing