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Functional Built-In Delay Binning and Calibration Mechanism for On-Chip at-Speed Self Test.

Chen-I ChungJyun-Sian JhouChing-Hwa ChengSih-Yan Li
Published in: Asian Test Symposium (2009)
Keyphrases
  • high speed
  • power dissipation
  • low cost
  • camera calibration
  • functional verification
  • sufficient conditions
  • multi view
  • low power
  • statistical tests
  • camera network
  • physical design
  • built in self test