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Design and analysis of a low power strategy in finite state machines implemented in configurable logic blocks.
Vivek Kumar Singh
Abhishek Nag
Sambhu Nath Pradhan
Published in:
Int. J. Embed. Syst. (2022)
Keyphrases
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low power
logic circuits
finite state machines
power consumption
low cost
digital circuits
single chip
high speed
vlsi architecture
low power consumption
delay insensitive
real time
gate array
power reduction
finite state automata
high power
power dissipation
design process
signal processing
database
ultra low power