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9.1x Error acceptable adaptive artificial neural network coupled LDPC ECC for charge-trap and floating-gate 3D-NAND flash memories.
Toshiki Nakamura
Yoshiaki Deguchi
Ken Takeuchi
Published in:
CICC (2018)
Keyphrases
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floating gate
artificial neural networks
error correction
low density parity check
neural network
error detection
ldpc codes
genetic algorithm ga
back propagation
feed forward
channel coding
high speed
error propagation