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Designing low-diameter interconnection networks with multi-ported host-switch graphs.
Ryota Yasudo
Koji Nakano
Michihiro Koibuchi
Hiroki Matsutani
Hideharu Amano
Published in:
Concurr. Comput. Pract. Exp. (2023)
Keyphrases
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interconnection networks
multistage
fault tolerant
parallel algorithm
message passing
high speed
bayesian networks
routing algorithm