An Optically Differential Reconfigurable Gate Array VLSI Chip with a Dynamic Reconfiguration Circuit.
Minoru WatanabeFuminori KobayashiPublished in: IPDPS (2005)
Keyphrases
- gate array
- dynamic reconfiguration
- low power
- high speed
- single chip
- low cost
- power dissipation
- logic circuits
- cmos technology
- application specific
- mixed signal
- software systems
- software architecture
- power consumption
- flip flops
- quality of service
- vlsi circuits
- analog vlsi
- chip design
- image sensor
- dynamic behavior
- vlsi design
- evolvable hardware
- physical design
- high density
- software development
- general purpose
- power reduction
- real time
- embedded systems
- response time