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Investigation of Dynamic Leakage-Suppression Logic Techniques Crossing Different Technology Nodes from 180 nm Bulk CMOS to 7 nm FinFET Plus Process.
Jieyu Li
Zihan Lian
Hao Zhang
Weifeng He
Yanan Sun
Mingoo Seok
Published in:
ISCAS (2021)
Keyphrases
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silicon on insulator
cmos technology
metal oxide semiconductor
nm technology
power consumption
development process
cost effective
transmission electron microscopy
real time
low cost
process model
logic programming
data processing
high speed
delay insensitive
knowledge representation
mobile devices
neural network