Synthesis of Sequential Circuits by Redundancy Removal and Retiming.

Hiroyuki Yotsuyanagi Seiji Kajihara Kozo Kinoshita

Published in: J. Electron. Test. (1997)

Keyphrases

analog circuits
logic synthesis
high speed
quantum computing
database
data mining
website
learning algorithm
decision trees
computational complexity
texture synthesis
circuit design
logic circuits
parallel version
lateral inhibition
redundancy reduction