FPGA and ASIC realisation of EMD algorithm for real-time signal processing.
Kaushik DasDebanjali NathSambhu Nath PradhanPublished in: IET Circuits Devices Syst. (2020)
Keyphrases
- signal processing
- hardware implementation
- real time
- worst case
- detection algorithm
- optimal solution
- computational cost
- hardware architecture
- computational complexity
- np hard
- expectation maximization
- preprocessing
- k means
- cost function
- dynamic programming
- recognition algorithm
- simulated annealing
- low cost
- search space
- particle swarm optimization
- fpga implementation
- mobile robot
- pattern recognition
- objective function
- image sequences
- image processing
- computer vision
- learning algorithm