High-performance noise-tolerant circuit techniques for CMOS dynamic logic.
Fabio FrustaciPasquale CorsonelloStefania PerriGiuseppe CocorulloPublished in: IET Circuits Devices Syst. (2008)
Keyphrases
- noise tolerant
- dynamic logic
- circuit design
- analog vlsi
- high speed
- delay insensitive
- cmos technology
- low voltage
- instance based learning algorithms
- noisy data
- modal logic
- reasoning about actions
- power dissipation
- imperative programs
- low power
- power consumption
- metal oxide semiconductor
- data sets
- statistical queries
- modal operators
- missing values
- upper bound
- knowledge base