A Hybrid DRAM/PCM Buffer Cache Architecture for Smartphones with QoS Consideration.
Ye-Jyun LinChia-Lin YangHsiang-Pang LiCheng-Yuan Michael WangPublished in: ACM Trans. Design Autom. Electr. Syst. (2017)
Keyphrases
- main memory
- memory subsystem
- memory access
- quality of service
- memory hierarchy
- virtual memory
- dynamic random access memory
- mobile devices
- web services
- packet switching
- cross layer
- real time
- multimedia communication
- dynamic reconfiguration
- prefetching
- data structure
- replacement policy
- multithreading
- ad hoc networks
- instruction set
- data access
- database management systems
- cache misses
- management system
- embedded dram