Login / Signup
A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS.
Wahid Rahman
Danny Yoo
Joshua Liang
Ali Sheikholeslami
Hirotaka Tamura
Takayuki Shibasaki
Hisakatsu Yamaguchi
Published in:
IEEE J. Solid State Circuits (2017)
Keyphrases
</>
metal oxide semiconductor
high speed
circuit design
low cost
cmos image sensor
integrated circuit
cmos technology
silicon on insulator
low power
image processing
digital media
mixed signal
computer simulation
power supply
delay insensitive
analog to digital converter