Login / Signup

A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.

Kyriakos ChristouMaria K. MichaelPaolo BernardiMichelangelo GrossoErnesto SánchezMatteo Sonza Reorda
Published in: VTS (2008)
Keyphrases
  • shortest path
  • fault diagnosis
  • personal computer
  • fault detection
  • levels of abstraction
  • genetic algorithm
  • hidden markov models
  • mobile robot
  • higher level
  • computer architecture
  • computing power
  • path length