Test clock domain optimization for peak power supply noise reduction during scan.
Jen-Yang WenYu-Chuan HuangMin-Hong TsaiKuan-Yu LiaoJames Chien-Mo LiMing-Tung ChangMin-Hsiu TsaiChih-Mou TsengHung-Chun LiPublished in: ITC (2011)
Keyphrases
- noise reduction
- power supply
- signal to noise ratio
- edge preserving
- edge detection
- edge enhancement
- intelligent control
- median filter
- noisy environments
- high speed
- optimization algorithm
- neural network
- speech enhancement
- control unit
- multiscale
- multi channel
- support vector machine
- artificial intelligence
- machine learning
- real time
- hearing aids