Custom 6-R, 2- or 4-W multi-port register files in an ASIC SOC with a DVFS window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS technology.
Henry HsiehSang H. DhongCheng-Chung LinMing-Zhang KuoKuo-Feng TsengPing-Lin YangKevin HuangMin-Jer WangWei HwangPublished in: CICC (2015)
Keyphrases
- cmos technology
- low power
- high speed
- single chip
- power reduction
- power consumption
- embedded dram
- clock frequency
- spl times
- low cost
- low voltage
- application specific
- power dissipation
- parallel processing
- mixed signal
- image sensor
- digital signal processing
- power management
- silicon on insulator
- hardware implementation
- file system
- circuit design
- energy saving
- integrated circuit
- energy efficiency
- real time