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Designing High-Performance Interconnection Networks with Host-Switch Graphs.
Ryota Yasudo
Michihiro Koibuchi
Koji Nakano
Hiroki Matsutani
Hideharu Amano
Published in:
IEEE Trans. Parallel Distributed Syst. (2019)
Keyphrases
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interconnection networks
fault tolerant
multistage
parallel computers
parallel algorithm
routing algorithm
message passing
high speed
real time
pairwise
dynamic programming