ASMPEC: Approximate-Sum-Based Mapping of Partial Products With Error Correction for Softcore Multipliers on FPGAs.
Zainab AizazKavita KharePublished in: IEEE Trans. Circuits Syst. II Express Briefs (2023)
Keyphrases
- error correction
- field programmable gate array
- hardware architecture
- hardware implementation
- embedded systems
- parallel computing
- image processing algorithms
- error correcting
- error detection
- error control
- computing systems
- massively parallel
- data hiding
- channel coding
- error detection and correction
- ldpc codes
- watermarking scheme
- reed solomon
- mapping function
- low cost
- image processing
- magnetic tape
- neural network