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Zainab Aizaz
ORCID
Publication Activity (10 Years)
Years Active: 2022-2024
Publications (10 Years): 6
Top Topics
Image Processing
Xilinx Virtex
Error Compensation
Energy Efficient
Top Venues
IEEE Trans. Circuits Syst. II Express Briefs
FCCM
IEEE Embed. Syst. Lett.
APCCAS
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Publications
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Zainab Aizaz
,
Kavita Khare
,
Aizaz Tirmizi
Approximate Row-Merging-Based Multipliers for Neural Network Acceleration on FPGAs.
IEEE Embed. Syst. Lett.
16 (2) (2024)
Zainab Aizaz
,
Kavita Khare
,
Aizaz Tirmizi
FASBM: FPGA-specific Approximate Sum-based Booth multipliers for energy efficient Hardware Acceleration of Image Processing and Machine Learning Applications.
FCCM
(2023)
Zainab Aizaz
,
Kavita Khare
ASMPEC: Approximate-Sum-Based Mapping of Partial Products With Error Correction for Softcore Multipliers on FPGAs.
IEEE Trans. Circuits Syst. II Express Briefs
70 (12) (2023)
Zainab Aizaz
,
Kavita Khare
,
Mohd Anas Khan
,
Mahesh Kumar Singh
,
Vaithiyanathan Dhandapani
A1RL: Approximate 1-Row-LUT-Based Low-Power Signed Multipliers for DSP and Machine Learning Applications on FPGAs.
APCCAS
(2023)
Zainab Aizaz
,
Kavita Khare
Area and Power Efficient Truncated Booth Multipliers Using Approximate Carry-Based Error Compensation.
IEEE Trans. Circuits Syst. II Express Briefs
69 (2) (2022)
Zainab Aizaz
,
Kavita Khare
Energy efficient approximate booth multipliers using compact error compensation circuit for mitigation of truncation error.
Int. J. Circuit Theory Appl.
50 (6) (2022)