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Gate stack optimization to minimize power consumption in super-lattice fets.
Pasquale Maiorano
Elena Gnani
Antonio Gnudi
Susanna Reggiani
Giorgio Baccarani
Published in:
ESSDERC (2013)
Keyphrases
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power consumption
low power
cmos technology
nm technology
energy efficiency
power saving
power management
data center
battery life
energy saving
energy management
save energy
power reduction
mobile clients
low power consumption
low cost
cost effective
high speed