Pipeline Scheduling for Array Based Reconfigurable Architectures Considering Interconnect Delays.
Shanghua GaoKenshu SetoSatoshi KomatsuMasahiro FujitaPublished in: FPT (2005)
Keyphrases
- interconnection networks
- fault tolerant
- heterogeneous computing
- multistage
- parallel algorithm
- routing algorithm
- message passing
- systolic array
- scheduling problem
- parallel architecture
- high speed
- shared memory
- round robin
- dynamic scheduling
- communication delays
- general purpose
- quality of service
- processing times
- parallel machines
- parallel computers
- real time database systems
- flexible manufacturing systems
- low cost
- programmable logic
- image processing