Tensors Masquerading as Matchgates: Relaxing Planarity Restrictions on Pfaffian Circuits.
Jacob TurnerPublished in: CoRR (2015)
Keyphrases
- high order
- delay insensitive
- high speed
- digital circuits
- vlsi circuits
- logic synthesis
- line drawings
- diffusion tensor
- tensor voting
- analog circuits
- tensor field
- tunnel diode
- analog vlsi
- circuit design
- data sets
- real time
- logic circuits
- quantum computing
- fault diagnosis
- artificial neural networks
- neural network
- high level synthesis