5GHz SRAM for High-Performance Compute Platform in 5nm CMOS.
R. MathurM. KumarVivek AsthanaS. AggarwalS. GuptaD. WanjulA. BaradiaS. ThotaP. JainB. ZhengA. CubetaS. ThyagarajanA. ChenY. K. ChongPublished in: CICC (2022)
Keyphrases
- power consumption
- embedded dram
- cmos technology
- random access memory
- low power
- high speed
- nm technology
- design considerations
- metal oxide semiconductor
- low voltage
- low power consumption
- real time
- silicon on insulator
- power reduction
- low cost
- leakage current
- dynamic random access memory
- clock frequency
- data transmission
- parallel processing
- power management
- single chip
- power supply