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Automatic Test Plan Generation for Analog and Mixed Signal Integrated Circuits using Partial Activation and High Level Simulation.
Ravindranath Naiknaware
G. N. Nandakumar
Srinivasa Rao Kasa
Published in:
ITC (1993)
Keyphrases
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integrated circuit
mixed signal
plan generation
low power
high level
multi channel
vlsi circuits
low level
plan recognition
digital circuits
built in self test
power consumption
low cost
planning problems
high speed
low voltage
plan execution
real time