Logic simulation and fault collapsing with shared structurally synthesized bdds.
Dmitri MironovRaimund UbarJaan RaikPublished in: ETS (2014)
Keyphrases
- fault diagnosis
- binary decision diagrams
- logic programming
- simulation study
- fault detection
- mathematical model
- simulation models
- sound and complete axiomatization
- real time
- asynchronous circuits
- defeasible logic
- computational properties
- classical logic
- simulation environment
- simulation model
- heuristic search
- data sets