Low Power Aging-Aware On-Chip Memory Structure Design by Duty Cycle Balancing.
Shuai WangTao JinChuanlei ZhengGuangshan DuanPublished in: J. Circuits Syst. Comput. (2016)
Keyphrases
- low power
- single chip
- power dissipation
- low power consumption
- low cost
- high speed
- power consumption
- cmos technology
- mixed signal
- nm technology
- logic circuits
- ultra low power
- vlsi architecture
- real time
- cmos image sensor
- analog to digital converter
- signal processor
- image sensor
- signal processing
- duty cycle
- gate array
- digital signal processing
- multi channel
- design process
- digital circuits
- image processing