Layout Dependent Effect-Aware Leakage Current Reduction and Its Application to Low-Power SAR-ADC.
Gong ChenYu ZhangQing DongMingyu LiShigetoshi NakatakePublished in: IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2015)
Keyphrases
- low power
- power consumption
- single chip
- low cost
- high speed
- leakage current
- cmos technology
- low voltage
- power reduction
- high power
- low power consumption
- vlsi architecture
- mixed signal
- logic circuits
- vlsi circuits
- real time
- power line
- power dissipation
- wide dynamic range
- cmos image sensor
- gate array
- image sensor
- hardware implementation
- digital images
- sensor networks