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Formal Modeling and Verification of Controllers for a Family of DRAM Caches.

Debiprasanna SahooSwaraj ShaManoranjan SatpathyMadhu MutyamS. RameshPartha S. Roop
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
Keyphrases
  • special case
  • model checking
  • formal specification
  • face verification
  • genetic algorithm
  • asynchronous circuits